The present invention relates to high electron mobility transistors (hereinafter, HEMTs) of gallium arsenide (GaAs) elements for high-speed data communication with low noise. More particularly, the present invention relates to a method of fabricating resist patterns in order to form a gamma gate for HEMTs and a method of forming a gamma gate using such resist patterns and a structure thereof.
A gamma gate is applied to HEMTs with a purpose of the reduction of gate resistance and element noise.
In related arts, it has been already known a method of forming two-layer or three-layer resist structure and a method of forming a gate based on the sensitivity difference between the resist layers. As shown in FIG. 1G, such gate formed according to the related art has a head wider than a footprint. According to the shape of the gate, it is called a xcex93-gate or xcex93-gate. The technique of forming such related art gate applies electron-beam lithography in order to satisfy a fine design-rule.
Now, referring to FIGS. 1A to 1G, a method of forming a related art xcex93-gate will be described. First, a PMMA resist 3 having a thickness of 0.15-0.2 xcexcm is coated on a GaAs wafer 4 (FIG. 1A). A P(MMA/MAA) resist 2, which has more greater sensitivity than the PMMA resist 3 and which has a thickness of 0.6 xcexcm is coated on the coated PMMA resist 3 (FIG. 1B). Using a dose converting method, the coated resists 2 and 3 are exposed to electron beams 1 by means of an electron beam lithography process (FIG. 1C). Then, electron beams are transmitted to the inside of the two resists 2 and 3 (FIG. 1D). A pattern for forming a xcex93-gate is formed by developing the resists 2 and 3 (FIG. 1E). A gate metal film 20 is deposited on a resultant structure (FIG. 1F). Then, the resists 2 and 3 are removed to thereby form a gamma gate having a head 21 and a footprint 22 (FIG. 1G).
However, since the method of the related art uses the electron-beam lithography, there are such problems as, for example, the reduction of productivity and requirements of high-priced equipment.
Thus, a method of forming the gamma gate without using the electron-beam lithography has been keenly required.
Accordingly, the present invention is directed to a method of fabricating a gamma gate of HEMT capable of obviating the problems due to limitations and disadvantages of the related art.
An object of the present invention is to provide a method of forming a resist pattern for forming a gamma gate having a fine gate footprint of about 0.1 xcexcm and a gate head of a certain size regardless of any kinds of exposing sources or equipments. Particularly, the present invention can provide a gamma gate having a fine resolution of 0.1 xcexcm or the equivalent, which cannot be achieved by conventional photolithography using contact or proximity type exposing source of I-line or G-line and a stepper.
Another object of the present invention is to provide a method of fabricating a gamma gate which is capable of remarkably reducing an element noise of HEMT.
To achieve these and other advantages, a method of fabricating a gamma gate according to the present invention comprises the steps of depositing a first resist layer on a GaAs substrate; forming a first resist pattern on the GaAs substrate by exposing, developing and baking the first resist layer, sequentially; depositing a second resist layer on the first resist pattern and the first resist layer; forming a second resist pattern so that a marginal portion of the second resist pattern overlaps the first resist pattern, by exposing, developing and baking the second resist layer, sequentially; etching the GaAs substrate using the first and second resist layers as a mask to form a recess on the GaAs substrate; depositing a metal layer on the resultant structure; and removing the first and second resist layers to form the gamma gate with a head and a footprint, wherein the footprint of the gamma gate is formed in the marginal portion of the second resist pattern overlapping the first resist pattern and the width of the overlapped portion defines the size of the footprint of the gamma gate, and wherein the head of the gamma gate is formed on the first resist layer in a residual portion of the second resist pattern other than the overlapped portion.
Preferably, the baking process during the step of forming the first resist pattern is conducted with application of ultraviolet rays at a temperature of above 120xc2x0 C.
More preferably, the developing process during the step of forming the second resist pattern is conducted at a negative slope of 89xc2x0 or less.
In another aspect of the present invention, a method of fabricating a gamma gate comprises the steps of depositing a first insulation layer on a GaAs substrate; depositing a first resist layer on the first insulation layer; forming a first resist pattern on the first insulation layer by exposing, developing and baking the first resist layer, sequentially; etching the first insulation layer using the first resist pattern as a mask and removing the first resist layer to form an insulation layer pattern; depositing a second resist layer on the insulation layer pattern and the first insulation layer; forming a second resist pattern by exposing, developing and baking the second resist layer, sequentially, so that a marginal portion of the second resist pattern overlaps the insulation layer pattern; etching the GaAs substrate using the first insulation layer and the second resist layer as a mask to form a recess on the GaAs substrate; depositing a metal layer on the resultant structure; removing the second resist pattern to form the gamma gate with a head and a footprint; and depositing a second insulation layer on the resultant structure so that the second insulation layer surrounds the gamma gate, wherein the footprint of the gamma gate is formed in the marginal portion of the second resist pattern overlapping the insulation layer pattern and the width of the overlapped portion defines the size of the footprint of the gamma gate, and wherein the head of the gamma gate is formed on the first insulation layer in a residual portion of the second resist pattern other than the overlapped portion.
Preferably, the baking process during the step of forming the first resist pattern is conducted with application of ultraviolet rays at a temperature of above 120xc2x0 C.
More preferably, the developing process during the step of forming the second resist pattern is conducted at a negative slope of 89xc2x0 or less.
Additionally, a structure of a gamma gate is characterized in that an insulation layer surrounds surrounding the gamma gate; the gamma gate has the lower part and the fore; and a portion of the insulation layer located on the lower part of the head of the gamma gate is different from a portion of the insulation layer surrounding the head of the gamma gate in thickness.